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3.0 GHz Medium Power Silicon RFIC Amplifier Technical Data
INA-34063
Features
* +8 dBm P1 dB at 1.9 GHz * 21 dB Gain at 1.9 GHz * High Isolation 32 dB at 1.9 GHz * Single +3V Supply * Unconditionally Stable
Surface Mount SOT-363 (SC-70) Package
Description
Hewlett-Packard's INA-34063 is a Silicon RFIC amplifier that offers excellent gain and output power for applications to 3.0 GHz. Packaged in an ultraminiature SOT-363 package, it requires half of the board space of a SOT-143 package. With its wide bandwidth and high linearity, the INA-34063 is suitable as a driver amplifier for various applications. The INA-34063 also features high reverse isolation, making it an excellent candidate for LO buffer applications. The INA-34063 is fabricated using HP's 30 GHz - fmax, ISOSATTM Silicon-bipolar process that uses nitride, self-alignment, submicrometer lithography, trench isolation, ion implantation, and polyimide intermetal dielectric and scratch protection to achieve superior performance, uniformity and reliability.
Applications
* LO Buffer and Driver Amplifier for Cellular, Cordless, Special Mobile Radio, PCS, ISM, Wireless LAN, DBS, TVRO, and TV Tuner
Pin Connections and Package Marking
GND 2 1 6 OUTPUT & Vd 5 GND 1 4 Vd
34
GND 1 2 INPUT 3
Note: Package marking provides orientation and identification.
Simplified Schematic
Vd
Output & Vd
Input
Gnd1
Gnd2
2
Absolute Maximum Ratings
Symbol Vd Pin Tj TSTG Parameter Device Voltage, RF output to ground CW RF Input Power Junction Temperature Storage Temperature Units V dBm C C Absolute Maximum[1] 6.0 +7.0 150 -65 to 150 Thermal Resistance[2]: jc = 170C/W
Notes: 1. Operation of this device above any one of these limits may cause permanent damage. 2. TC = 25C (TC is defined to be the temperature at the package pins where contact is made to the circuit board)
INA-34063 Electrical Specifications, TC = 25C, ZO = 50 ,Vd = 3 V
Symbol |S 21| 2 Parameters and Test Conditions Gain in 50 system f = 0.9 GHz f = 1.9 GHz f = 2.4 GHz Noise Figure f = 1.9 GHz Output Power at 1 dB Gain Compression f = 0.9 GHz f = 1.9 GHz f = 2.4 GHz Output Third Order Intercept Point f = 0.9 GHz f = 1.9 GHz f = 2.4 GHz Input VSWR f = 0.1 - 2.4 GHz Output VSWR f = 0.1 - 2.4 GHz Device Current Units Min. dB 18.0 [3] dB dBm Typ. Max. Std. Dev.[4] 20.1 21.4 0.39 20.6 4.5 0.19 7.8 8.2 6.5 19.4 18.0 15.6 1.35:1 1.10:1 30 37 [3] 0.9
NF50 P1dB
IP3
dBm
VSWRin VSWRout
d
mA
Notes: 3. Guaranteed specifications are 100% tested in production. 4. Standard deviation number is based on measurement of a large number of parts from three non-consecutive wafer lots during the initial characterization of this product, and is intended to be used as an estimate for distribution of the typical specification.
3
INA-34063 Typical Performance, TC = 25C, ZO = 50 , V d = 3 V
25 6 5.5 NOISE FIGURE (dB) 20 GAIN (dB) 5 4.5 4 3.5 3 1.5 2.0 2.5 3.0 0 0.5 1.0 1.5 2.0 2.5 3.0 FREQUENCY (GHz) 2.7 V 3.0 V 3.3 V P1 dB (dBm) 12 10 8 6 4 2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 FREQUENCY (GHz) 2.7 V 3.0 V 3.3 V
15 2.7 V 3.0 V 3.3 V 0 0.5 1.0
10
FREQUENCY (GHz)
Figure 1. Gain vs. Frequency and Voltage.
Figure 2. Noise Figure vs. Frequency and Voltage.
Figure 3. Output Power for 1 dB Gain Compression vs. Frequency and Voltage.
12
25
7 -40C +25C +85C P1 dB (dBm)
6 20 GAIN (dB)
NOISE FIGURE (dB)
10 8 6 4 2 0
-40C +25C +85C
5
4
15 -40C +25C +85C 0 0.5 1.0 1.5 2.0 2.5 3.0
3
10
2 0 0.5 1.0 1.5 2.0 2.5 3.0 FREQUENCY (GHz)
0
0.5
1.0
1.5
2.0
2.5
3.0
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 4. Gain vs. Frequency and Temperature.
Figure 5. Noise Figure vs. Frequency and Temperature.
Figure 6. Output Power for 1 dB Gain Compression vs. Frequency and Temperature.
3 2.5 2
50 -40C +25C +85C
22 20 18
40
30 1.5 1 0.5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 FREQUENCY (GHz) VSWR in VSWR out 10 Id (mA) VSWR
IP3 (dBm)
16 14 12 10 -40C +25C +85C 0 0.5 1.0 1.5 2.0 2.5 3.0
20
0 0 1 2 Vd (V) 3 4 5
FREQUENCY (GHz)
Figure 7. Input and Output VSWR vs. Frequency.
Figure 8. Supply Current vs. Voltage and Temperature.
Figure 9. Third Order Intercept Point, IP3 vs. Frequency and Temperature.
4
INA-34063 Typical Scattering Parameters[5], TC = 25C, ZO = 50 ,Vd = 3.0 V
Freq. GHz
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 Note:
5. Reference plane per Figure 15 in Applications Information section.
S11 Mag
0.14 0.14 0.14 0.15 0.15 0.15 0.16 0.16 0.17 0.17 0.18 0.18 0.18 0.18 0.18 0.18 0.18 0.18 0.17 0.17 0.18 0.18 0.18 0.19 0.20 0.20 0.20 0.21 0.21 0.22 0.22 0.23 0.25 0.26 0.27 0.28 0.30 0.31 0.31 0.32 0.33 0.34 0.34 0.35 0.35 0.36 0.37 0.37 0.38 0.39
Ang
2 3 2 2 4 -1 -3 -5 -7 -10 -13 -16 -20 -23 -26 -32 -39 -45 -50 -55 -61 -64 -67 -69 -73 -74 -77 -79 -84 -87 -92 -96 -101 -106 -109 -112 -115 -118 -120 -122 -125 -128 -131 -135 -138 -142 -146 -149 -152 -156
dB
19.3 19.3 19.4 19.4 19.5 19.6 19.8 19.9 20.1 20.3 20.4 20.6 20.8 21.0 21.1 21.1 21.3 21.3 21.4 21.4 21.3 21.1 20.9 20.6 20.3 19.9 19.5 19.0 18.6 18.1 17.6 17.1 16.6 16.1 15.6 15.1 14.6 14.1 13.6 13.2 12.7 12.2 11.8 11.4 10.9 10.5 10.1 9.6 9.3 8.9
S21 Mag
9.23 9.26 9.30 9.38 9.48 9.58 9.75 9.93 10.12 10.31 10.53 10.75 10.96 11.16 11.29 11.39 11.56 11.68 11.75 11.76 11.65 11.37 11.04 10.73 10.33 9.85 9.39 8.92 8.50 8.03 7.59 7.19 6.78 6.39 6.02 5.69 5.37 5.07 4.80 4.55 4.32 4.09 3.89 3.70 3.52 3.35 3.19 3.04 2.90 2.77
Ang
-4 -9 -13 -17 -22 -27 -31 -36 -41 -46 -52 -57 -63 -69 -76 -82 -89 -95 -103 -110 -118 -125 -132 -140 -147 -154 -161 -167 -173 -180 17 169 163 158 153 148 143 139 134 130 126 122 118 114 110 106 103 99 96 93
dB
-28.0 -28.9 -28.7 -29.2 -29.3 -29.1 -29.5 -29.9 -30.2 -30.2 -30.3 -30.6 -30.9 -31.2 -31.5 -31.6 -31.9 -32.3 -32.8 -33.1 -33.6 -34.1 -34.7 -35.2 -35.7 -36.3 -37.1 -38.0 -39.1 -39.8 -40.8 -41.5 -41.6 -41.0 -39.5 -37.8 -36.6 -35.3 -33.7 -32.3 -31.3 -30.2 -29.2 -28.1 -27.3 -26.5 -25.7 -25.1 -24.3 -23.6
S12 Mag
0.040 0.036 0.037 0.035 0.034 0.035 0.034 0.032 0.031 0.031 0.030 0.030 0.029 0.027 0.026 0.026 0.025 0.024 0.023 0.022 0.021 0.020 0.018 0.017 0.016 0.015 0.014 0.013 0.011 0.010 0.009 0.008 0.008 0.009 0.011 0.013 0.015 0.017 0.021 0.024 0.027 0.031 0.035 0.039 0.043 0.047 0.052 0.055 0.061 0.066
Ang
1.65 -1 -5 -10 -8 -11 -14 -14 -15 -15 -16 -19 -20 -20 -21 -22 -25 -27 -29 -30 -34 -36 -39 -43 -48 -54 -63 -73 -83 -96 -113 -130 -143 -153 -162 -172 -178 178 174 170 165 163 160 156 154 151 148 146 143 141
Mag
0.049 0.085 0.070 0.089 0.077 0.059 0.069 0.080 0.087 0.097 0.104 0.115 0.136 0.160 0.190 0.212 0.217 0.237 0.256 0.270 0.284 0.303 0.318 0.326 0.326 0.330 0.331 0.331 0.325 0.314 0.305 0.293 0.277 0.262 0.249 0.234 0.217 0.201 0.188 0.173 0.158 0.144 0.130 0.117 0.104 0.093 0.083 0.075 0.070 0.066
S 22 Ang
-42 -24 -26 -16 -33 -38 -44 -56 -74 -90 -103 -111 -123 -131 -140 -154 -159 -166 -172 -178 178 172 166 160 156 152 147 142 138 134 130 126 122 119 116 112 109 106 102 98 94 89 84 77 71 63 55 46 36 24
K Factor
1.50 1.61 1.58 1.62 1.65 1.61 1.61 1.67 1.67 1.65 1.66 1.62 1.64 1.70 1.72 1.70 1.73 1.76 1.81 1.87 1.94 2.04 2.28 2.44 2.66 2.95 3.29 3.69 4.57 5.32 6.29 7.48 7.93 7.51 6.53 5.86 5.36 5.02 4.32 3.99 3.74 3.43 3.22 3.03 2.91 2.78 2.63 2.62 2.46 2.37
5
INA-34063 Applications Information
Introduction
The INA-34063 is a +3 volt silicon RFIC amplifier that is designed with a two stage internal network to provide a broadband gain and 50 input and output impedance. With a P-1 dB compressed output power of 8 dBm and noise figure of 4.5 dB at 1900 MHz, the INA-34063 is well suited for amplifier applications in mobile communication. A feature of the INA-34063 is a positive gain slope over the 1-2 GHz range that is useful in many satellite-based TV and datacom systems. In addition to use in TV delivery systems, the INA-34063 will find many applications in battery operated wireless communication systems.
The Vd connection to the amplifier is RF bypassed by placing a capacitor to ground near the Vd pin of the amplifier package. The power supply connection to the RF Output pin is achieved by means of a RF choke (inductor). The value of the RF choke must be large relative to 50 in order to prevent loading of the RF Output. The supply voltage end of the RF choke is bypassed to ground with a capacitor. If the physical layout permits, this can be the same bypass capacitor that is used at the Vd terminal of the amplifier. Blocking capacitors are normally placed in series with the RF Input and the RF Output to isolate the DC voltages on these pins from circuits adjacent to the amplifier. The values for the blocking and bypass capacitors are selected to provide a reactance at the lowest frequency of operation that is small relative to 50 .
are used to bring the ground to the topside of the circuit where needed. The performance of INA-34063 is sensitive to ground path inductance. The two-stage design creates the possibility of a feedback loop being formed through the ground returns of the stages, Gnd 1 and Gnd 2.
Gnd 1
Gnd 2
VIA
Figure 12. INA-34063 Potential Ground Loop.
Gnd 1 VIA
Gnd 2 VIA
Operating Details
The INA-34063 is a voltage-biased device that operates from a +3 volt power supply with a typical current drain of 30 mA. All bias regulation circuitry is integrated into the RFIC. Figure 10 shows a typical implementation of the INA-34063. The supply voltage for the INA-34063 must be applied to two terminals, the Vd pin and the RF Output pin.
Gnd2 Cout Gnd1 RF Output RFC Vd Cblock Cbypass
Example Layout for 50 Output Amplifier
An example layout for an amplifier using the INA-34063 with 50 input and 50 output is shown in Figure 11.
Gnd 1 RF Input 50 Gnd 2 50 RF Output and Vd Gnd 1
Figure 11. RF Layout.
Figure 13. INA-34063 Suggested Layout.
At least one ground via should be placed adjacent to each ground pin to assure good RF grounding. Multiple vias are used to reduce the inductance of the path to ground and should be placed as close to the package terminals as practical. The effects of the potential ground loop shown in Figure 12 may be observed as a "peaking" in the gain versus frequency response, an increase in input VSWR, or even as return gain at the input of the INA-34063. Figure 14 shows an assembled amplifier. The +3 volt supply is fed directly into the Vd pin of the
34
Gnd1 RF Input
Figure 10. Basic Amplifier Application.
This example uses a microstripline design (solid groundplane on the backside of the circuit board). The circuit board material is 0.031-inch thick FR-4. Plated through holes (vias)
6
C3
For this demonstration circuit, the value chosen for the RF choke was 120 nH (Coilcraft 1008CS-221, TOKO LL2012-F or equivalent). All of the blocking and bypass capacitors are 100 pF. The gap in the output transmission line was bridged using copper foil cut to size. These values provide excellent amplifier performance from under 50 MHz through 2.4 GHz. Larger values for the choke and capacitors can be used to extend the lower end of the bandwidth. Since the gain of the INA-34063 extends down to DC, the frequency response of the amplifier is limited only by the values of the capacitors and choke. A convenient method for making RF connection to the demonstration board is to use a PCB mounting type of SMA connector (Johnson 142-0701-881, or equivalent). These connectors can be slipped over the edge of the PCB and the center conductor soldered to the input and output lines. The ground pins of the connectors can be soldered to the ground plane on the backside of board.
Figure 14. Assembled Amplifier.
PCB Materials
Typical choices for PCB material for low cost wireless applications are FR-4 or G-10 with a thickness of 0.025 (0.635 mm) or 0.031inches (0.787 mm) A thickness of 0.062 inches (1.574 mm) is the maximum that is recommended for use with this particular device. The use of a thicker board material increases the inductance of the plated through vias used for RF grounding and may deteriorate circuit performance. Adequate grounding is needed not only to obtain maximum amplifier performance but also to reduce any possibility of instability.
Phase Reference Planes
The positions of the reference planes used to measure S-Parameters for this device are shown in Figure 15. As seen in the illustration, the reference planes are located at the point where the package leads contact the test circuit.
32
INA-34063 and into the RF Output pin through the RF choke (RFC). Capacitor C3 provides RF bypassing for both the V d pin and the power supply end of the RFC. Capacitor C4 is optional and may be used to add additional bypassing for the V d line. A well-bypassed Vd line is especially necessary in cascades of amplifier stages to prevent oscillation that may occur as a result of RF feedback through the power supply lines.
INA-3XX63 DEMO BOARD
C1 C2 RFC
C4 Vd
REFERENCE PLANES
TEST CIRCUIT
Figure 15. Phase Reference Planes.
SOT-363 PCB Layout
The INA-34063 is packaged in the miniature SOT-363 (SC-70) surface mount package. A PCB pad layout for the SOT-363 package is shown in Figure 16 (dimensions are in inches). This layout provides ample allowance for package placement by automated assembly equipment without adding pad parasitics that could impair the high frequency performance of the INA-34063. The layout that is shown with a nominal SOT-363 package footprint superimposed on the PCB pads for reference.
7
0.026
0.075
0.035
0.016
Figure 16. PCB Pad Layout for INA-32063 (dimensions in inches).
or mathematical averaging may not be practical, such as S-parameters or Noise Parameters and the performance curves, the data represents a nominal part taken from the "center" of the characterization distribution. Typical values are intended to be used as a basis for electrical design. To assist designers in optimizing not only the immediate circuit using the INA-34063, but to also optimize and evaluate trade-off that affect a complete wireless system, the standard deviation () is provided for many of the Electrical Specifications parameters (at 25C) in addition to the mean. The standard deviation is a measure of the variability about the mean. It will be recalled that a normal distribution is completely described by the mean and standard deviation. Standard statistics tables or calculations provide the probability of a parameter falling between any two values, usually symmetrically located about the mean. Referring to Figure 17 for example, the probability of a parameter being between 1 is 68.3%; between 2 is 95.4%; and between 3 is 99.7%.
SMT Assembly
Reliable assembly of surface mount components is a complex process that involves many material, process, and equipment factors, including: method of heating (e.g., IR or vapor phase reflow, wave soldering, etc.) circuit board material, conductor thickness and pattern, type of solder alloy, and the thermal conductivity and thermal mass of components. Components with a low mass, such as the SOT-363 package, will reach solder reflow temperatures faster than those with a greater mass. The INA-34063 has been qualified to the time-temperature profile shown in Figure 18. This profile is representative of an IR reflow type of surface mount assembly process. After ramping up from room temperature, the circuit board with components attached to it (held in place with solder paste) passes through one or more preheat zones. The preheat zones increase the temperature of the board and components to prevent thermal shock and begin evaporating solvents from the solder paste. The reflow zone briefly elevates the temperature sufficiently to produce a reflow of the solder. The rates of change of temperature for the ramp-up and cool down zones are chosen to be low enough to not cause deformation of the board or damage to components due to thermal shock. These parameters are typical for a surface mount assembly
Statistical Parameters
Several categories of parameters appear within this data sheet. Parameters may be described with values that are either "minimum or maximum," "typical," or "standard deviations." The values for parameters are based on comprehensive product characterization data, in which automated measurements are made on a large number of parts taken from 3 non-consecutive process lots of semiconductor wafers. The data derived from product characterization tends to be normally distributed, e.g., fits the standard "bell curve." Parameters considered to be the most important to system performance are bounded by minimum or maximum values. For the INA-34063, these parameters are: Power Gain (|S21| 2 ) and the Device Current (Id). Each of these guaranteed parameters is 100% tested. Values for most of the parameters in the table of Electrical Specifications that are described by typical data are the mathematical mean (), of the normal distribution taken from the characterization data. For parameters where measurements
68%
95% 99% -3 -2 -1 Mean +1 +2 (), typ Parameter Value +3
Figure 17. Normal Distribution.
8
process for the INA-34063. As a general guideline, the circuit board and components should only be exposed to the minimum temperatures and times necessary to achieve a uniform reflow of solder. For more information on mounting considerations for packaged microwave semiconductors please refer to Hewlett-Packard application note AN-A006.
250
Electrostatic Sensitivity
RFICs are electrostatic discharge (ESD) sensitive devices. Although the INA-34063 is robust in design, permanent damage may occur to these devices if they are subjected to high-energy electrostatic discharges. Electrostatic charges as high as several thousand volts (which readily accumulate on the
human body and on test equipment) can discharge without detection and may result in degradation in performance or failure. Electronic devices may be subjected to ESD damage in any of the following areas: * Storage & handling * Inspection & testing * Assembly * In-circuit use The INA-34063 is an ESD Class 1 device. Therefore, proper ESD precautions are recommended when handling, inspecting, and assembling these devices to avoid damage. For more information on Electrostatic Discharge and Control refer to Hewlett-Packard application note AN-A004R.
TMAX 200 TEMPERATURE (C)
150 Reflow Zone 100 Preheat Zone 50 0 0 60 120 180 240 300 TIME (seconds) Cool Down Zone
Figure 18. Surface Mount Assembly Profile.
9
Package Dimensions
Outline 63 (SOT-363/SC-70)
1.30 (0.051) REF.
2.20 (0.087) 2.00 (0.079)
1.35 (0.053) 1.15 (0.045)
0.650 BSC (0.025) 2.20 (0.087) 1.80 (0.071) 0.10 (0.004) 0.00 (0.00) 0.425 (0.017) TYP.
0.30 REF.
1.00 (0.039) 0.80 (0.031) 0.25 (0.010) 0.15 (0.006)
10
0.30 (0.012) 0.10 (0.004)
0.20 (0.008) 0.10 (0.004)
DIMENSIONS ARE IN MILLIMETERS (INCHES)
INA-34063 Part Number Ordering Information
Part Number INA-34063-BLK INA-34063-TR1 INA-34063-TR2 Devices per Container 100 3,000 10,000 Container tape strip in antistatic bag 7" reel 13" reel
Tape Dimensions and Product Orientation
For Outline 63
P P0 D P2
E
F W C 34 34
D1 t1 (CARRIER TAPE THICKNESS) Tt (COVER TAPE THICKNESS)
8 MAX.
K0
5 MAX.
A0
B0
DESCRIPTION CAVITY LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER DIAMETER PITCH POSITION WIDTH THICKNESS WIDTH TAPE THICKNESS CAVITY TO PERFORATION (WIDTH DIRECTION) CAVITY TO PERFORATION (LENGTH DIRECTION)
SYMBOL A0 B0 K0 P D1 D P0 E W t1 C Tt F P2
SIZE (mm) 2.24 0.10 2.34 0.10 1.22 0.10 4.00 0.10 1.00 + 0.25 1.55 0.05 4.00 0.10 1.75 0.10 8.00 0.30 0.255 0.013 5.4 0.10 0.062 0.001 3.50 0.05 2.00 0.05
SIZE (INCHES) 0.088 0.004 0.092 0.004 0.048 0.004 0.157 0.004 0.039 + 0.010 0.061 0.002 0.157 0.004 0.069 0.004 0.315 0.012 0.010 0.0005 0.205 0.004 0.0025 0.00004 0.138 0.002 0.079 0.002
PERFORATION
CARRIER TAPE COVER TAPE DISTANCE
www.hp.com/go/rf For technical assistance or the location of your nearest Hewlett-Packard sales office, distributor or representative call: Americas/Canada: 1-800-235-0312 or 408-654-8675 Far East/Australasia: Call your local HP sales office. Japan: (81 3) 3335-8152 Europe: Call your local HP sales office. Data subject to change. Copyright (c) 1998 Hewlett-Packard Co. Printed in U.S.A. 5967-5768E (5/98)

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